Computing systems and other electronic devices include multiple communication paths to route signals between the various system components (e.g., circuit chips). Due to space constraints, the signals are typically routed adjacent one another, causing the signals to couple during operation. Such coupling (also referred to as “cross talk”) may degrade the signal quality and/or timing of the signal. Accordingly, those involved with developing computing systems and other electronic devices try to predict the amount and type of coupling that may occur during operation of the design in order to reduce the negative effects of coupling.
An approach for predicting the effects of coupling involves generating and propagating every possible signal bit pattern and timing combination that is expected during operation of an electronic device. Depending on the number of bits in the pattern and duration of each bit interval, hundreds (or even thousands) of tests may be needed to accurately predict the effects of signal coupling for the electronic device.
These tests take time to develop and run (in some cases as much as 4 hours for each test). Running the tests in parallel may reduce some of this time, but the tradeoff requires more computing resources including both the hardware and, software (e.g., additional licenses for the test software). In any event, these simulations consume time and computing resources, delaying introduction of the final product and increasing its cost.